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Systems & Performance
The most popular blog posts about systems & performance on Hacker News. 6,942 posts.
SimpleVisor – Intel VT-x hypervisor in 500 lines of C code
Simplevisor : SimpleVisor is a simple, portable, Intel VT-x hypervisor with two specific goals: using the least amount of assembly code (10 lines), and having the smallest amount of VMX-related code to support dynamic hyperjacking and unhyperjacking (that is, virtualizing the host state from within the host). It runs…
Linux v4.15: Performance Goodies
With the Meltdown and Spectre fiascos , performance isn't a very hot topic at the moment. In fact, with Linux v4.15 released, it is one ...
Making Windows Slower Part 2: Process Creation
Windows has long had a reputation for slow file operations and slow process creation. Have you ever wanted to make these operations even slower? This weeks’ blog post covers a technique you can use…
Storage engine design
In time-series databases the querying pattern differs from the write pattern. We usually write data in time order by updating many series every second. But querying is a different story. We usually want to read only a handful of series leaving most of the data behind. Here lies the biggest problem, which is we don’t…
Understanding modern Linux routing (and wg-quick)
Back in the old days, I could just type route (or, later, ip route) in my Linux terminal and get an accurate picture of all my routes. This is no longer the case.
Over the Air: Exploiting Broadcom’s Wi-Fi Stack (Part 2)
Posted by Gal Beniamini, Project ZeroIn this blog post we'll continue our journey into gaining re...
Using cgroups to limit I/O
Developers running their apps on tsuru can choose plans based on memory and cpu usage. We were looking at adding I/O usage as one of the plan’s features, so one could choose how many I/O operations per second or bytes per second a container may be able to read/write. Being able to limit I/O is particulary important…
Postgres Data Flow
What happens when you query Postgres? Data can actually come from many different places like the application cache, buffer cache, and even down into the physical disk cache. This post surveys the data storage and flow of Postgres data.
JavaScript-heavy approaches are not compatible with long-term performance goals
I’m Sérgio, and I work with Web frontend code. Sometimes I write about it here.
M4 Macs can't virtualise older macOS
A bug, most probably in the early part of kernel boot in guest macOS, prevents M4 Macs virtualising macOS prior to 13.4.
If All You Have Is a Database, Everything Looks Like a Nail
Databases are fabulous resources. Of course, we’ll abuse them in ways that cause challenges.
Time Machine in macOS 10.15.3 is very slow on first full backup
When making a first full backup of less than 2 GB takes 86 minutes, and you then can’t restore from it anyway.
C++ on Embedded Systems
Yet another programming blog. Thoughts on software and related misadventures.
27000 errors in the Tizen operating system
This article will demonstrate that during the development of large projects static analysis is not just a useful, but a completely necessary part of the development process. This article is the first...
Emacs standing alone on a Linux Kernel (2004)
Nano How-To explaining how to setup a root file system with only emacs.
How we’ve made Raptor fast
Ruby web server up to 4x faster than Unicorn, up to 2x faster than Puma and Torquebox.
Adopting Microservices at Netflix
Deliver modern applications with NGINX. Explore high-performance load balancing, API gateways, and web server solutions trusted by top global enterprises.
Execute Docker Containers as QEMU MicroVMs
Execute docker containers securely in a multi-tenant environment by combining the isolation level of VMs with the docker ecosystem.
Disable transparent hugepages
tl;dr “Transparent Hugepages” is a Linux kernel feature intended to improve performance by making more efficient use of your processor’s memory-mapping hardware. It is enabled ("enabled=always") by default in most Linux distributions. Transparent Hugepages gives some applications a small performance improvement (~ 10%…
How Does an Intel Processor Boot?
When we switch on a computer, it goes through a series of steps before it is able to load the operating system. In this post we will see how a typical x86 processor boots. This is a very complex an…
Memory Safe Inline Assembly
Since Fil-C 0.685, memory-safe inline assembly is supported on both X86_64 and ARM64.
Packets per Second Limitations in EC2
Part 2 in our series on PPS limitations in AWS EC2 will help your organization.