Paweł Dziepak personal blog

On lists, cache, algorithms, and microarchitecture

Lists are rather hardware-unfriendly data structure. However, having a closer look at why is that and what can be done to improve this can provide an interesting insight into how high-level algorithms performance is affected by the processor microarchitecture.
Points
167
HN comments
14
Submissions
1
Cited by
0 commenters

Systems & PerformanceSoftware Engineering2019

On Hacker News

SubmittedTitle on HNPointsComments
May 2, 2019On lists, cache, algorithms, and microarchitecture by ingve16714

More from Paweł Dziepak

All 2 posts →

Related posts from the same era