Dan Luu personal blog
How to Write Safe Verilog: Become a PL Troll
Troll? That's how people write Verilog 1 . At my old company, we had a team of formal methods PhD's who wrote a linter that typechecked our code, based on our naming convention. For our chip (which was small for a CPU), building a model (compiling) took about five minutes, running a single short test took ten to…
- Points
- 108
- HN comments
- 52
- Submissions
- 1
- Cited by
- 0 commenters
Hardware & ElectronicsSoftware Engineering2013
On Hacker News
| Submitted | Title on HN | Points | Comments |
|---|---|---|---|
| Sep 16, 2013 | How to Write Safe Verilog: Become a PL Troll by luu | 108 | 52 |
