RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration.
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At RISC-V Summit North America 2025, Andrea Gallo, CEO RISC-V International, and Phil Wennblom, Chair of the ISO/IEC Joint Technical Committee (JTC 1)., announced that RISC-V International has been approved as a PAS Submitter by the ISO/IEC JTC1.
one of our goals with the workshop is to give students an opportunity to learn logic design earlier in their education--like, say, as a college freshman or sophomore. So just imagine our surprise when Nicholas introduced himself in the chat forum of our workshop.
RISC-V International Staff RISC-V International’s staff bring together expertise from multiple disciplines to advance our mission of promoting the RISC-V instruction set architecture (ISA). On the RISC-V blog, we highlight...
RISC-V Community News Success in the mobile and consumer device market depends on a vibrant software ecosystem. Over the past decade the Android Open Source Project (AOSP) has become one...
Anisha Sharma Marketing Specialist, RISC-V International Anisha is part of the RISC-V International marketing team, responsible for managing social media and tracking the latest updates from our members. She brings...